2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)

Strong correlation between dielectric reliability and charge trapping in SiO/sub 2//Al/sub 2/O/sub 3/ gate stacks with TiN electrodes

Pub Date : 2002-06-11 DOI: 10.1109/VLSIT.2002.1015396 A. Kerber, E. Cartier, R. Degraeve, L. Pantisano, P. Roussel, G. Groeseneken

Novel polycrystalline gate engineering for high performance sub-100 nm CMOS devices

Pub Date : 2002-06-11 DOI: 10.1109/VLSIT.2002.1015421 K. Uejima, T. Yamamoto, T. Mogami

A ferroelectric analog associative memory technology employing hetero-gate floating-gate-MOS structure

Pub Date : 2002-06-11 DOI: 10.1109/VLSIT.2002.1015415 D. Kobayashi, T. Shibata, Y. Fujimori, T. Nakamura, H. Takasu