{"title":"Digital redesign of a continuous controller based on closed loop performance","authors":"R. A. Kennedy, R. Evans","doi":"10.1109/CDC.1990.203950","DOIUrl":null,"url":null,"abstract":"The authors present a digital controller redesign philosophy which attempts to match the closed-loop performance of a nominal continuous-time controller using a model-following design setting. The requirement of excessive sampling rates necessary with a number of popular existing techniques (e.g. the prewarped bilinear transform redesign) is largely obviated. Sampling rates close to twice the closed-loop bandwidth (Nyquist rate) give good performance with the proposed technique. It is concluded that the proposed model can be used as is for an analog-to-digital redesign which appears to work favorably at low sampling rates, or it can be used as a starting point for further pole-zero placement.<<ETX>>","PeriodicalId":287089,"journal":{"name":"29th IEEE Conference on Decision and Control","volume":"57 9","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"31","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"29th IEEE Conference on Decision and Control","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CDC.1990.203950","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 31
Abstract
The authors present a digital controller redesign philosophy which attempts to match the closed-loop performance of a nominal continuous-time controller using a model-following design setting. The requirement of excessive sampling rates necessary with a number of popular existing techniques (e.g. the prewarped bilinear transform redesign) is largely obviated. Sampling rates close to twice the closed-loop bandwidth (Nyquist rate) give good performance with the proposed technique. It is concluded that the proposed model can be used as is for an analog-to-digital redesign which appears to work favorably at low sampling rates, or it can be used as a starting point for further pole-zero placement.<>