A CMOS negative supply for large dynamic range high-bandwidth analog circuits

Abstract

To address the problem of current source output impedance degradation in a large full-scale sub-ranging ADC's reference ladder, a feedback closed-loop negative supply system, occupying 0.028 mm2 in 0.18-µm CMOS, is proposed. This system can be applied to overcome headroom issues in other high-performance large-dynamic-range analog circuits such as large input swing continuous-time filters, analog amplifiers, buffers and analog precision control loops. With a more than 40% power efficient core and a small on-chip 16-pF MOS capacitor, this architecture provides a power and area efficient solution. Supporting up to a 400-µA current, the system generates a −0.7 V output with less than 5-mV ripple, which can easily be suppressed by more than 40 dB by a linear regulator.