{"title":"Area efficient system-on-programmable-chip design for a wireless touch-triggered machining probe","authors":"K. Mimis, T. Koçak","doi":"10.1109/ICIEA.2011.5975751","DOIUrl":null,"url":null,"abstract":"In this paper, we present the design and implementation details of a System-on-Programmable-Chip (SoPC), which replaces the circuitry that controls the operation of a touch-triggered machining probe with radio transmission capability. The probe is used to get precise measurements of three dimensional geometric parts. The goal is to achieve size reduction of an existing circuitry inside the probe, that consists of two microcontrollers and a reconfigurable hardware device such as a Field Programmable Gate Array (FPGA), that implements some custom functions. In order to reduce the printed circuit board (PCB) area occupied by these three chips and the associated routing area, we combine them on a single SoPC. An overall 6 fold reduction in PCB area occupied, corresponding to nearly 15cm2 is achieved.","PeriodicalId":304500,"journal":{"name":"2011 6th IEEE Conference on Industrial Electronics and Applications","volume":"59 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 6th IEEE Conference on Industrial Electronics and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIEA.2011.5975751","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, we present the design and implementation details of a System-on-Programmable-Chip (SoPC), which replaces the circuitry that controls the operation of a touch-triggered machining probe with radio transmission capability. The probe is used to get precise measurements of three dimensional geometric parts. The goal is to achieve size reduction of an existing circuitry inside the probe, that consists of two microcontrollers and a reconfigurable hardware device such as a Field Programmable Gate Array (FPGA), that implements some custom functions. In order to reduce the printed circuit board (PCB) area occupied by these three chips and the associated routing area, we combine them on a single SoPC. An overall 6 fold reduction in PCB area occupied, corresponding to nearly 15cm2 is achieved.