Systematic complexity reduction for digital square timing recovery

Abstract

A systematic approach to the complexity minimization of digital square timing recovery is discussed. It is demonstrated that, for narrowband data signals, a prefilter is mandatory to suppress the pattern noise. A least squared error approach is used to determine the tap weights of an FIR prefilter implementation. The data interpolator coefficients are optimized using a minimum mean squared error method. Two versions of the clock recovery are considered. One is based on a processing rate of two samples per symbol for the prefilter and data interpolator. The squarer and postprocessor (time extractor) part require four samples/symbol. A prefilter interpolator is used for upsampling. The other version processes four samples per symbol in all blocks. A postprocessing method is proposed, which reduces the complexity of the postprocessor block by 25% in comparison with the DFT-approach. Depending on the excess bandwidth factor r of the data signal, 15-21 multiply and accumulate operations per symbol are sufficient for a blockwise timing estimation.<>