Volume Implementation of MCM-D Based Cache SRAM Products for Workstation and PC Applications

Abstract

Multichip modules have been used in large numbers of memory applications for over ten years. This paper outlines the use of MCM-D in a high-performance family of SRAM modules designed to take advantage of a number of recent changes in the MCM infrastructure. The products are designed for high volume, high-performance, relatively cost-sensitive insertions in support of current and next-generation microprocessor-based system families. This paper discusses the design and implementation of MicroModule System's ChipFrame cache SRAMS. Included are a discussion of package alternatives reviewed prior to standardization on 28mm 160-lead PQFP, the test strategies employed by both IC suppliers and the MCM foundry, and a summary of reliability programs used in product development and design verification. The discussion will also include sample system implementations using these MCMs.