Efficient circuit specific pseudoexhaustive testing with cellular automata

S. Chattopadhyay
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引用次数: 7

Abstract

Pseudoexhaustive testing of a combinational circuit involves applying all possible input patterns to all its individual output cones. Since it does not assume any fault model, the testing ensures detection of all static detectable faults in the circuit that do not require two-pattern tests. Earlier works on pseudoexhaustive testing usually generate test sets that are several orders of magnitude larger than the minimum size test set required for a specific circuit, and are mostly based on LFSRs. This paper presents a novel strategy for constructing circuit-specific pseudoexhaustive test pattern generators, based on cellular automata, that result in generating minimal pseudoexhaustive test sets for combinational circuits. Experimentation with ISCAS85 benchmarks show that as compared to the LFSRs, the cellular automata based approach often results in simpler circuitry with lesser number of shift stages and reduced test length. Moreover, the analytical technique developed here is generic in nature and thus can also be applied for constructing LFSR based pseudoexhaustive test pattern generators.
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有效的电路特定伪穷举测试与元胞自动机
组合电路的伪穷举测试包括将所有可能的输入模式应用于其所有单独的输出锥。由于它不假设任何故障模型,因此测试确保检测电路中不需要双模式测试的所有静态可检测故障。早期关于伪穷举测试的工作通常生成的测试集比特定电路所需的最小尺寸测试集大几个数量级,并且主要基于lfsr。本文提出了一种基于元胞自动机构造电路专用伪穷举测试图生成器的新策略,该策略可以生成最小的组合电路伪穷举测试集。ISCAS85基准测试的实验表明,与lfsr相比,基于元胞自动机的方法通常导致更简单的电路,更少的移位阶段数量和更短的测试长度。此外,本文所开发的分析技术在本质上是通用的,因此也可以用于构建基于LFSR的伪穷举测试模式生成器。
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Time slot specification based approach to analog fault diagnosis using built-in current sensors and test point insertion Efficient circuit specific pseudoexhaustive testing with cellular automata A ROMless LFSR reseeding scheme for scan-based BIST A fault-tolerant architecture for symmetric block ciphers High precision result evaluation of VLSI
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