Rabindranath Das Adhikary, Writwik Balow, T. Halder
{"title":"Diode & Neutral Point Clamped Five-Level Inverter For the Power Quality Issues","authors":"Rabindranath Das Adhikary, Writwik Balow, T. Halder","doi":"10.1109/DEVIC.2019.8783920","DOIUrl":null,"url":null,"abstract":"The five-level inverter is attractive for medium power applications with reduced voltage and current stress by virtue of which lower rating of semiconductors for the medium and high voltage applications. This inverter is productive for the reduced total harmonic distortions (THD) to accomplish the good quality of the power in addition to lower size of the filter components as cost effective solution for the aggressive power market. The inverter also make certain to avoid the complications of the static and dynamic voltage sharing when the power semiconductors are connected in series with a multi-leveled-inverter topology.","PeriodicalId":294095,"journal":{"name":"2019 Devices for Integrated Circuit (DevIC)","volume":"285 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Devices for Integrated Circuit (DevIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DEVIC.2019.8783920","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
The five-level inverter is attractive for medium power applications with reduced voltage and current stress by virtue of which lower rating of semiconductors for the medium and high voltage applications. This inverter is productive for the reduced total harmonic distortions (THD) to accomplish the good quality of the power in addition to lower size of the filter components as cost effective solution for the aggressive power market. The inverter also make certain to avoid the complications of the static and dynamic voltage sharing when the power semiconductors are connected in series with a multi-leveled-inverter topology.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
