Low-Voltage Analog Circuit Techniques Using Bias-Current Re-Utilization, Self-Biasing and Signal Superposition

Hoi Lee, K. Leung, P. Mok
{"title":"Low-Voltage Analog Circuit Techniques Using Bias-Current Re-Utilization, Self-Biasing and Signal Superposition","authors":"Hoi Lee, K. Leung, P. Mok","doi":"10.1109/EDSSC.2005.1635326","DOIUrl":null,"url":null,"abstract":"Techniques of bias-current re-utilization, self-biasing and signal superposition for low-voltage analog circuit designs are presented in this paper. When these techniques are adopted in a three-stage active-feedback compensated amplifier by using a self-cascode common-gate structure, the circuit complexity of the amplifier is simplified. In addition, the power consumption, parasitic capacitance and systematic offset voltage of the amplifier can be greatly reduced. The effectiveness of the proposed design methodologies is verified by remarkable HSPICE simulation results.","PeriodicalId":429314,"journal":{"name":"2005 IEEE Conference on Electron Devices and Solid-State Circuits","volume":"494 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE Conference on Electron Devices and Solid-State Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2005.1635326","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

Abstract

Techniques of bias-current re-utilization, self-biasing and signal superposition for low-voltage analog circuit designs are presented in this paper. When these techniques are adopted in a three-stage active-feedback compensated amplifier by using a self-cascode common-gate structure, the circuit complexity of the amplifier is simplified. In addition, the power consumption, parasitic capacitance and systematic offset voltage of the amplifier can be greatly reduced. The effectiveness of the proposed design methodologies is verified by remarkable HSPICE simulation results.
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利用偏置电流再利用、自偏置和信号叠加的低压模拟电路技术
本文介绍了低压模拟电路设计中的偏置电流再利用、自偏置和信号叠加技术。在采用自级联码共门结构的三级有源反馈补偿放大器中采用这些技术,可以简化放大器的电路复杂度。此外,还可以大大降低放大器的功耗、寄生电容和系统失调电压。HSPICE仿真结果验证了所提设计方法的有效性。
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