{"title":"Design of Dual-Band Chireix Outphasing Power Amplifier","authors":"Hang Chen, Jin-Xu Xu, Xiu Yin Zhang","doi":"10.1109/iwem53379.2021.9790552","DOIUrl":null,"url":null,"abstract":"This paper presents a novel dual-band Chireix outphasing power amplifier (PA). π-shaped network is used to design dual-band components. While the paralleled susceptance components can be merged and design together, which simplify the design procedures. Moreover, a symmetrical configuration instead of asymmetric one is added at the combining node to enhance efficiency. Mechanism of the PA is analyzed. The design methodology is formulated. For verification, a prototype operating at 1.6 and 2.2 GHz is simulated with the peak efficiencies of >70.5%, saturated output powers of >43.2 dBm, and 6-dB back-off efficiency of >62%.","PeriodicalId":141204,"journal":{"name":"2021 IEEE International Workshop on Electromagnetics: Applications and Student Innovation Competition (iWEM)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Workshop on Electromagnetics: Applications and Student Innovation Competition (iWEM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/iwem53379.2021.9790552","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper presents a novel dual-band Chireix outphasing power amplifier (PA). π-shaped network is used to design dual-band components. While the paralleled susceptance components can be merged and design together, which simplify the design procedures. Moreover, a symmetrical configuration instead of asymmetric one is added at the combining node to enhance efficiency. Mechanism of the PA is analyzed. The design methodology is formulated. For verification, a prototype operating at 1.6 and 2.2 GHz is simulated with the peak efficiencies of >70.5%, saturated output powers of >43.2 dBm, and 6-dB back-off efficiency of >62%.
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