{"title":"Design and Performance Analysis of Multilayer On-Chip Band Pass Filter for RF Circuits","authors":"Nagesh Deevi, N. Rao","doi":"10.1109/APWiMob48441.2019.8964146","DOIUrl":null,"url":null,"abstract":"In this paper on-chip multi-layer inductor is proposed using VLSI multi-layer design concept. Proposed multi-layer inductor shows 40% improvement in terms of Q-factor and 20% improvement in terms of inductance, when compared with standard 3-D inductor. Multi-layer inductor has maximum Quality factor (Q-factor) of 32 at 30 GHz, 3.9nH of inductance at 60 GHz and self-resonant frequency at 61 GHz. Proposed Multi-layer inductor is designed using 3D simulation software tool and the performance is analysed by parametric variations in terms of width of conductor and spacing between conductors. This inductor occupies on- chip area of 100μmx100μm. Using designed multilayer inductor, band pass filter is proposed which has center frequency at 36.5 GHz, bandwidth of 4 GHz, loaded Q value of 9.125 and fractional bandwidth of 10.9% which is suitable for narrow band operations. On-chip area occupied by the filter is 150μmx150μ m which is suitable for RF circuits.","PeriodicalId":286003,"journal":{"name":"2019 IEEE Asia Pacific Conference on Wireless and Mobile (APWiMob)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Asia Pacific Conference on Wireless and Mobile (APWiMob)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APWiMob48441.2019.8964146","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper on-chip multi-layer inductor is proposed using VLSI multi-layer design concept. Proposed multi-layer inductor shows 40% improvement in terms of Q-factor and 20% improvement in terms of inductance, when compared with standard 3-D inductor. Multi-layer inductor has maximum Quality factor (Q-factor) of 32 at 30 GHz, 3.9nH of inductance at 60 GHz and self-resonant frequency at 61 GHz. Proposed Multi-layer inductor is designed using 3D simulation software tool and the performance is analysed by parametric variations in terms of width of conductor and spacing between conductors. This inductor occupies on- chip area of 100μmx100μm. Using designed multilayer inductor, band pass filter is proposed which has center frequency at 36.5 GHz, bandwidth of 4 GHz, loaded Q value of 9.125 and fractional bandwidth of 10.9% which is suitable for narrow band operations. On-chip area occupied by the filter is 150μmx150μ m which is suitable for RF circuits.