A high-speed thin-film memory: its design and development

Q. Simkins
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引用次数: 6

Abstract

Memories in today's high-performance systems are typically made up of memory modules of capacity comparable to the new memory to be described here. Cycle times are 500 nsec to 1 μsec with access times of 300 to 500 nsec. This paper presents the design of a thin-film main memory with a capacity of 8,192 words of 72 bits each. The cycle time of this memory is 120 nsec with an access time of 60 nsec. Thus, this memory design represents a 4-to-8-times improvement in main memory performance over the present state of the art.
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一种高速薄膜存储器的设计与研制
当今高性能系统中的内存通常由容量与这里描述的新内存相当的内存模块组成。周期为500nsec ~ 1 μsec,访问次数为300 ~ 500nsec。本文设计了一种容量为8192字,每字72位的薄膜主存储器。该内存的周期时间为120nsec,访问时间为60nsec。因此,这种内存设计代表了4到8倍的改进主存性能比目前的艺术状态。
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