{"title":"An algorithm for array variable clustering","authors":"L. Ramachandran, D. Gajski, Viraphol Chaiyakul","doi":"10.1109/EDTC.1994.326867","DOIUrl":null,"url":null,"abstract":"During synthesis of behavioral descriptions array variables are implemented with memory modules. In this paper we show that simple one-to-one mapping between the array variables and the memory modules lead to inefficient designs. We propose a new algorithm, MeSA, which computes for a given set of array variables, (a) the number of memory modules, (b) the size of each module (c) the number of ports on each module and (d) and the grouping of array variables assigned to each memory module. The effects of address translations are incorporated into the algorithm. While most previous research efforts have concentrated on scalar variables, the primary focus in this paper is deriving efficient storage assignment for array variables.<<ETX>>","PeriodicalId":244297,"journal":{"name":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","volume":"82 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"92","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDTC.1994.326867","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 92
Abstract
During synthesis of behavioral descriptions array variables are implemented with memory modules. In this paper we show that simple one-to-one mapping between the array variables and the memory modules lead to inefficient designs. We propose a new algorithm, MeSA, which computes for a given set of array variables, (a) the number of memory modules, (b) the size of each module (c) the number of ports on each module and (d) and the grouping of array variables assigned to each memory module. The effects of address translations are incorporated into the algorithm. While most previous research efforts have concentrated on scalar variables, the primary focus in this paper is deriving efficient storage assignment for array variables.<>