High speed LVDS driver for SERDES

Abstract

Low Voltage Differential Signaling (LVDS) is a method used for high-speed transmission of binary data over copper cable. In the earlier remote sensing payload camera electronics, the multi-port parallel data were provided to spacecraft base-band system, requiring large number of I/O connectors and associated harnesses. This multi-port parallel data can be multiplexed, serialized and transmitted to other subsystems using LVDS interface thereby reducing the number of I/Os, cabling and associated weight of interface hardware. This work presents the design, simulation and analysis of I/O interface circuits for high speed operation which is fully compliant with the IEEE STD 1596.3 (LVDS). A common mode feedback (CMFB) circuitry is utilized in the LVDS transmitter to stabilize the common mode voltage in a pre-defined range. In most of the previous designs [1] output cells utilize voltage divider circuit composed of two large resistors (≈MΩ) between output pads and center is taped as feedback. These resistors may be off-chip discrete components (due to stringent stability and large die area requirement). The modified common mode feedback circuit has been designed and analyzed with appropriate transistor geometry and evaluated. Its performance is also compared with conventional CMFB design.