Low-Power 60GHz Receiver with an Integrated Analog Baseband for FMCW Radar Applications in 28nm CMOS Technology

Abstract

This paper presents a highly-integrated low-power 57 − 64 GHz receiver realized in a 28 nm bulk CMOS technology. The receiver chip integrates RF front-end and analog baseband (ABB), designed specifically for short-range frequency-modulated continuous wave (FMCW) radar systems. The RF front-end includes an LNA, a passive mixer and a transimpedance amplifier (TIA), while the analog signal processing chain consists of an active high-pass-filter (HPF), programmable gain amplifier (PGA) and 4th order anti-aliasing filter (AAF). To enhance the temperature stability, constant gm biasing is implemented. Furthermore, DTMOS technique is used to make biasing more robust against PVT variations. The receiver achieves peak conversion gain of 77 dB and overall noise figure of 13 dB, with the ABB contribution. The chip including pads occupies an area of only 700 μm × 625 μm. The circuit is operated from a single 0.9 V supply and draws 44 mA for the RF front-end and 2.2 mA for the ABB chain, resulting in 42 mW.