A sub-1V voltage-mode DC-DC buck converter using PWM control technique

Ming-Xiang Lu, Bo-Han Hwang, Jiann-Jong Chen, Yuh-Shyan Hwang
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引用次数: 14

Abstract

A sub-1V CMOS DC-DC buck converter with 90% efficiency is presented in this paper. The proposed buck converter uses a digital error amplifier that can make the input voltage lower than other conventional buck converters. The buck converter uses voltage-mode control with pulse width modulation (PWM) techniques. The ramp generator of buck converter uses a Schmitt trigger circuit to replace the bias circuit and comparator. The scheme can reduce the power consumption and improving the power efficiency. The buck converter has been implemented with a 0.18-µm CMOS process. The buck converter is designed and the operating frequency is at 1MHz with the inductor of 4.7-uH and the output capacitor of 47-uF to reduce component size and switching loss. Experimental results prove that the converter can be directly powered with 1-V input voltage and output 0.5-V voltage at 500-mA output current.
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一种采用PWM控制技术的亚1v电压型DC-DC降压变换器
本文提出了一种效率达90%的低于1v的CMOS DC-DC降压变换器。所提出的降压变换器采用数字误差放大器,可以使输入电压低于其他传统的降压变换器。buck变换器采用带脉宽调制(PWM)技术的电压模式控制。降压变换器的斜坡发生器采用施密特触发电路代替偏置电路和比较器。该方案可以降低功耗,提高电源效率。buck变换器采用0.18µm CMOS工艺实现。设计降压变换器,工作频率为1MHz,电感为4.7-uH,输出电容为47-uF,以减小元件尺寸和开关损耗。实验结果证明,该变换器可以在输入电压为1 v,输出电流为500 ma时直接供电,输出电压为0.5 v。
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