{"title":"A sub-1V voltage-mode DC-DC buck converter using PWM control technique","authors":"Ming-Xiang Lu, Bo-Han Hwang, Jiann-Jong Chen, Yuh-Shyan Hwang","doi":"10.1109/EDSSC.2010.5713791","DOIUrl":null,"url":null,"abstract":"A sub-1V CMOS DC-DC buck converter with 90% efficiency is presented in this paper. The proposed buck converter uses a digital error amplifier that can make the input voltage lower than other conventional buck converters. The buck converter uses voltage-mode control with pulse width modulation (PWM) techniques. The ramp generator of buck converter uses a Schmitt trigger circuit to replace the bias circuit and comparator. The scheme can reduce the power consumption and improving the power efficiency. The buck converter has been implemented with a 0.18-µm CMOS process. The buck converter is designed and the operating frequency is at 1MHz with the inductor of 4.7-uH and the output capacitor of 47-uF to reduce component size and switching loss. Experimental results prove that the converter can be directly powered with 1-V input voltage and output 0.5-V voltage at 500-mA output current.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2010.5713791","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
A sub-1V CMOS DC-DC buck converter with 90% efficiency is presented in this paper. The proposed buck converter uses a digital error amplifier that can make the input voltage lower than other conventional buck converters. The buck converter uses voltage-mode control with pulse width modulation (PWM) techniques. The ramp generator of buck converter uses a Schmitt trigger circuit to replace the bias circuit and comparator. The scheme can reduce the power consumption and improving the power efficiency. The buck converter has been implemented with a 0.18-µm CMOS process. The buck converter is designed and the operating frequency is at 1MHz with the inductor of 4.7-uH and the output capacitor of 47-uF to reduce component size and switching loss. Experimental results prove that the converter can be directly powered with 1-V input voltage and output 0.5-V voltage at 500-mA output current.