{"title":"A 16-bit monolithic I3L processor","authors":"C. Erickson, H. Hingarh, R. Moeckel, D. Wilnai","doi":"10.1109/ISSCC.1977.1155638","DOIUrl":null,"url":null,"abstract":"A SINGLE-CHIP 16-BIT MICROPROCESSOR with fixed point arithmetic using 2’s complement notation will be described. It executes the same instruction set as the NOVA line of minicomputers and has comparable performance and is packaged in a 40-pin DIP. Figure 1 is the logic symbol of the processor and shows various data and control lines noted below. (1)lnformation Bus IBo-IB15 is a 16-bit bidirectional 3-state bus used to transfer address, data, and instruction information between the processor and main memory, and to transfer data to and from I/O devices. (2)S ta tus Lines RUN, CARRY and INT.ON are used to convey the status information of the processor mainly for display on an operator console. (3) Operator Console Control Co-C3, RESET. Operator can control the operation of the processor by means of 4 coded lines (Co-3) and a RESET line. (4)lnput/Output Control 00.01, INT. REQ., DCH. REQ. Processor controls 1/0 devices by means of two coded control lines (00,Ol)I/O devices can interrupt the normal program flow by activating the INT. REQ. line and they can gain direct access to main memory bv activating the DCII. REQ. line. (5)!kmory Control Mo-M~, MBSY. Processor controls thc main memory by means o f 3 open collcctor control lines (Mo, M1, M2). It synchronizes itself to the memory cycle time indicated by the MBSY signal. ( 6 ) Timing SYN, CP, XTL, CIKOUT. Processor can operate with an on-chip oscillator when a crystal is tied between (CP) and (XTL,) or i t can operatc from an external clock (CP). Processor generates a synchronization signal (SYN) for all external devices. The internal clock is available to the outside world on (CLKOUT).","PeriodicalId":416313,"journal":{"name":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1977.1155638","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A SINGLE-CHIP 16-BIT MICROPROCESSOR with fixed point arithmetic using 2’s complement notation will be described. It executes the same instruction set as the NOVA line of minicomputers and has comparable performance and is packaged in a 40-pin DIP. Figure 1 is the logic symbol of the processor and shows various data and control lines noted below. (1)lnformation Bus IBo-IB15 is a 16-bit bidirectional 3-state bus used to transfer address, data, and instruction information between the processor and main memory, and to transfer data to and from I/O devices. (2)S ta tus Lines RUN, CARRY and INT.ON are used to convey the status information of the processor mainly for display on an operator console. (3) Operator Console Control Co-C3, RESET. Operator can control the operation of the processor by means of 4 coded lines (Co-3) and a RESET line. (4)lnput/Output Control 00.01, INT. REQ., DCH. REQ. Processor controls 1/0 devices by means of two coded control lines (00,Ol)I/O devices can interrupt the normal program flow by activating the INT. REQ. line and they can gain direct access to main memory bv activating the DCII. REQ. line. (5)!kmory Control Mo-M~, MBSY. Processor controls thc main memory by means o f 3 open collcctor control lines (Mo, M1, M2). It synchronizes itself to the memory cycle time indicated by the MBSY signal. ( 6 ) Timing SYN, CP, XTL, CIKOUT. Processor can operate with an on-chip oscillator when a crystal is tied between (CP) and (XTL,) or i t can operatc from an external clock (CP). Processor generates a synchronization signal (SYN) for all external devices. The internal clock is available to the outside world on (CLKOUT).