{"title":"Higher-level development and COTS hardware expand FPGA boundaries","authors":"Jamie Brettle, A. Kruger","doi":"10.1109/AUTEST.2009.5314035","DOIUrl":null,"url":null,"abstract":"FPGA development tools can be complex, especially for users outside the digital design space. As a result of this complexity, industry is calling for software tools to increase efficiency of digital designers by abstracting the low-level details of FPGA programming. Most importantly, this process must close the growing gap between hardware and software design. New tools are emerging to help scientists and engineers use FPGAs without requiring the knowledge of low level Hardware Description Languages (HDLs) or board layout. These domain expert users can use prior knowledge in software design or graphical approaches to create complex systems that include Digital Signal Processing (DSP), Direct Memory Access (DMA), Digital Communication Protocols, and more all within an FPGA. With the ability to use C programming on the host and higher level tools for FPGA development on the target, software engineers can use FPGA technologies along with processors to run algorithms on the most efficient hardware target for test applications. This paper will cover examples of these tools and detail how higher-level abstraction, coupled with COTS hardware, can bring FPGA technology to new domains and users.","PeriodicalId":187421,"journal":{"name":"2009 IEEE AUTOTESTCON","volume":"105 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE AUTOTESTCON","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AUTEST.2009.5314035","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
FPGA development tools can be complex, especially for users outside the digital design space. As a result of this complexity, industry is calling for software tools to increase efficiency of digital designers by abstracting the low-level details of FPGA programming. Most importantly, this process must close the growing gap between hardware and software design. New tools are emerging to help scientists and engineers use FPGAs without requiring the knowledge of low level Hardware Description Languages (HDLs) or board layout. These domain expert users can use prior knowledge in software design or graphical approaches to create complex systems that include Digital Signal Processing (DSP), Direct Memory Access (DMA), Digital Communication Protocols, and more all within an FPGA. With the ability to use C programming on the host and higher level tools for FPGA development on the target, software engineers can use FPGA technologies along with processors to run algorithms on the most efficient hardware target for test applications. This paper will cover examples of these tools and detail how higher-level abstraction, coupled with COTS hardware, can bring FPGA technology to new domains and users.