{"title":"Simulation of a flip chip bonding technique using reactive foils","authors":"F. Kraemer, C. Pauly, F. Muecklich, S. Wiese","doi":"10.1109/EUROSIME.2015.7103143","DOIUrl":null,"url":null,"abstract":"New bonding techniques are required in order to overcome the problems caused by the necessary interconnection of big and thin silicon chips with organic interposers. A local heat source at the bonding interface would be beneficial in order to reduce the adverse thermal stress on the emerging assemblies. The required local heating can be achieved by reactive foils, which are stacks of thin metal layers that intermix after an ignition and supply thermal energy during this reaction. This paper summarises the results of a thermal transient FEM analysis, which checks the applicability of reactive foils as local heat source for the soldering of flip chip interconnections. This thermal analysis applies an artificial test structure with the interconnection dimensions of a flip chip assembly. The surrounding silicon chip and substrate have much larger dimensions in order to act as a heat sink with a large thermal mass. The interconnections are arranged in such a way that thermal interactions between adjacent interconnections can be analysed. The thermal energy of the reactive foil is induced sequentially to the assembly at the interface between substrate pad and solder joint. The simulation results show a localised influence of the thermal energy to the assembly. The heat distributes over the substrate pads and the adjacent solder volume. Increased temperatures are barely visible in the substrate and the silicon chip. The substrate acts as thermal isolator and the heat conduction through the solder ball is much slower than the reaction speed of the foil. Thus, even the small pitch between the flip chip interconnections causes a sufficient thermal isolation during the rapid process. The temperature increase at the silicon is just less than 10K. However the thermal isolation enables the conversion of the limited thermal energy into high temperatures. The temperatures on top of the copper pad are sufficiently high to melt the adjacent solder. Furthermore the temperatures are high enough to continue the self-propagating reaction of the foil. The major influence on the resulting maximum temperature is the energy input of the foil, which is defined by the type of reactive system and its thickness.","PeriodicalId":250897,"journal":{"name":"2015 16th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 16th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUROSIME.2015.7103143","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
New bonding techniques are required in order to overcome the problems caused by the necessary interconnection of big and thin silicon chips with organic interposers. A local heat source at the bonding interface would be beneficial in order to reduce the adverse thermal stress on the emerging assemblies. The required local heating can be achieved by reactive foils, which are stacks of thin metal layers that intermix after an ignition and supply thermal energy during this reaction. This paper summarises the results of a thermal transient FEM analysis, which checks the applicability of reactive foils as local heat source for the soldering of flip chip interconnections. This thermal analysis applies an artificial test structure with the interconnection dimensions of a flip chip assembly. The surrounding silicon chip and substrate have much larger dimensions in order to act as a heat sink with a large thermal mass. The interconnections are arranged in such a way that thermal interactions between adjacent interconnections can be analysed. The thermal energy of the reactive foil is induced sequentially to the assembly at the interface between substrate pad and solder joint. The simulation results show a localised influence of the thermal energy to the assembly. The heat distributes over the substrate pads and the adjacent solder volume. Increased temperatures are barely visible in the substrate and the silicon chip. The substrate acts as thermal isolator and the heat conduction through the solder ball is much slower than the reaction speed of the foil. Thus, even the small pitch between the flip chip interconnections causes a sufficient thermal isolation during the rapid process. The temperature increase at the silicon is just less than 10K. However the thermal isolation enables the conversion of the limited thermal energy into high temperatures. The temperatures on top of the copper pad are sufficiently high to melt the adjacent solder. Furthermore the temperatures are high enough to continue the self-propagating reaction of the foil. The major influence on the resulting maximum temperature is the energy input of the foil, which is defined by the type of reactive system and its thickness.