Hybrid instruction set simulation for fast and accurate memory access profiling

Abstract

Detailed memory access traces are extremely helpful for system partitioning and optimization in the context of hardware/software codesign, especially in early design stages. The prevalent technique for the generation of such traces is interpretive instruction set simulation which, however, depends on detailed modeling and further results in poor performance. With compiled simulation techniques, performance can be improved, but accurate memory access traces come at the expense of higheffort, complex, and inflexible toolchains. In order to overcome these bottlenecks, we present a hybrid profiling method that combines benefits from both worlds for a flexible workflow at minimum modeling effort. Experimental results confirm our method the same accuracy as interpretive simulation while being 50.3 times faster on average. Even compared to compiled simulation-based profiling, we achieve a mean speedup of 1.8 at 11.9% higher accuracy.