{"title":"Scaling carbon nanotube CMOS FETs towards quantum limit","authors":"Chenguang Qiu, Zhiyong Zhang, Lianmao Peng","doi":"10.1109/IEDM.2017.8268334","DOIUrl":null,"url":null,"abstract":"Owing to its ultra-thin body and high carrier mobility, semiconducting carbon nanotube (CNT) has been considered as an ideal channel material for future field-effect transistors (FETs) with sub 10 nm channel length. With well-designed device structure and when combined with graphene, we demonstrated high performance top-gated CNT FETs with gate length scaled down to 5nm. Scaling trend study reveals that sub-10 nm CNT CMOS FETs significantly outperform Si CMOS FETs with the same gate length but at much lower supply voltage Vds (0.4 V vs. 0.7 V), with an excellent sub-threshold slope swing (SS) of about 73mV/decade even with the gate length being scaled down to 5 nm. The 5 nm CNT FET begins to touch the quantum limit of a FET, and involves approximately only one electron when switching between on-state and off-state. These results show that CNT CMOS technology has the potential to go much further than that of Si towards quantum limit.","PeriodicalId":412333,"journal":{"name":"2017 IEEE International Electron Devices Meeting (IEDM)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE International Electron Devices Meeting (IEDM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2017.8268334","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Owing to its ultra-thin body and high carrier mobility, semiconducting carbon nanotube (CNT) has been considered as an ideal channel material for future field-effect transistors (FETs) with sub 10 nm channel length. With well-designed device structure and when combined with graphene, we demonstrated high performance top-gated CNT FETs with gate length scaled down to 5nm. Scaling trend study reveals that sub-10 nm CNT CMOS FETs significantly outperform Si CMOS FETs with the same gate length but at much lower supply voltage Vds (0.4 V vs. 0.7 V), with an excellent sub-threshold slope swing (SS) of about 73mV/decade even with the gate length being scaled down to 5 nm. The 5 nm CNT FET begins to touch the quantum limit of a FET, and involves approximately only one electron when switching between on-state and off-state. These results show that CNT CMOS technology has the potential to go much further than that of Si towards quantum limit.