Fault-secure shifter design: results and implementations

R. O. Duarte, M. Nicolaidis, H. Bederr, Y. Zorian
{"title":"Fault-secure shifter design: results and implementations","authors":"R. O. Duarte, M. Nicolaidis, H. Bederr, Y. Zorian","doi":"10.1109/EDTC.1997.582379","DOIUrl":null,"url":null,"abstract":"Self-checking designs will gain increasing interest in industrial applications if they satisfy the following requirements: high fault coverage, reduced hardware cost and reduced design effort. This work is aimed to reach these requirements for the design of self-checking shifters and is part of a broader project concerning the design of self-checking data paths.","PeriodicalId":297301,"journal":{"name":"Proceedings European Design and Test Conference. ED & TC 97","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings European Design and Test Conference. ED & TC 97","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDTC.1997.582379","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10

Abstract

Self-checking designs will gain increasing interest in industrial applications if they satisfy the following requirements: high fault coverage, reduced hardware cost and reduced design effort. This work is aimed to reach these requirements for the design of self-checking shifters and is part of a broader project concerning the design of self-checking data paths.
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故障安全移位器设计:结果和实现
如果满足以下要求,自检设计将在工业应用中获得越来越多的兴趣:高故障覆盖率,降低硬件成本和减少设计工作量。这项工作旨在达到自检移位器设计的这些要求,并且是有关自检数据路径设计的更广泛项目的一部分。
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