{"title":"LBIST-PUF: An LBIST Scheme Towards Efficient Challenge-Response Pairs Collection and Machine-Learning Attack Tolerance Improvement","authors":"Michihiro Shintani, Tomoki Mino, M. Inoue","doi":"10.1109/ATS49688.2020.9301590","DOIUrl":null,"url":null,"abstract":"Device identification using challenge-response pairs (CRPs), in which the response is obtained from a physically unclonable function (PUF), is a promising countermeasure for the counterfeit of integrated circuits (ICs). To achieve secure device identification, a large number of CRPs are collected by the manufacturers, thereby increasing the measurement costs. This paper proposes a novel scheme, which employs a logic built-in self-test (LBIST) circuit, to efficiently collect the CRPs during production tests. As a result, no additional measurement is required for the CRP collection. In addition, the proposed technique can counter machine-learning (ML) attacks because of the complicated relationship between challenge and response through the LBIST circuit. Through the proof-of-concept implementation, in which a field-programmable gate array (FPGA) is used, we demonstrate the PUF performance can be evaluated by a test pattern generated by the LBIST circuit. Furthermore, the vulnerability due to ML attacks using a support vector machine (SVM) and random forest (RF) is lowered by more than two times compared to the naive usage of PUF.","PeriodicalId":220508,"journal":{"name":"2020 IEEE 29th Asian Test Symposium (ATS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 29th Asian Test Symposium (ATS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS49688.2020.9301590","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Device identification using challenge-response pairs (CRPs), in which the response is obtained from a physically unclonable function (PUF), is a promising countermeasure for the counterfeit of integrated circuits (ICs). To achieve secure device identification, a large number of CRPs are collected by the manufacturers, thereby increasing the measurement costs. This paper proposes a novel scheme, which employs a logic built-in self-test (LBIST) circuit, to efficiently collect the CRPs during production tests. As a result, no additional measurement is required for the CRP collection. In addition, the proposed technique can counter machine-learning (ML) attacks because of the complicated relationship between challenge and response through the LBIST circuit. Through the proof-of-concept implementation, in which a field-programmable gate array (FPGA) is used, we demonstrate the PUF performance can be evaluated by a test pattern generated by the LBIST circuit. Furthermore, the vulnerability due to ML attacks using a support vector machine (SVM) and random forest (RF) is lowered by more than two times compared to the naive usage of PUF.