An approach to a multimedia system on a chip

Abstract

Issues of system-on-a-chip are reviewed and the reduction of the initial cost, mainly occupied by chip reworks, is shown to be the most important issue. In order to reduce chip reworks, SOC design methodologies based on applications can be segregated into three classes. One of three classes is to employ a programmable approach. The expansion of this class highly depends on the introduction of powerful programmable cores. Our dynamically reconfigurable logic engine (DRLE), which utilizes a FPGA approach with dynamically re-configurable functions, seems to be a promising way.