TEM analysis of failed bits and improvement of data retention properties in megabit-DRAMS

S. Onishi, A. Ayukawa, K. Tanaka, K. Sakiyama
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引用次数: 7

Abstract

Direct observation of failed bits in DRAMs indicates that the dislocation lines originating at the sidewall edge of the cell plate cause data retention errors. The elongated dislocation lines were observed during the annealing treatment after As-implantation. It was found that the failure due to n/sup +/-substrate leakage in the cell increased in proportion to the dislocation density. The failure due to the leakage was greatly decreased by eliminating As-implantation in the regions between the cell plate and the transfer gate. The yields were also improved.<>
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失效位的透射电镜分析及兆位dram数据保留性能的改进
对dram中失效位的直接观察表明,起源于晶片侧壁边缘的位错线导致数据保留错误。在砷注入后的退火处理过程中观察到拉长的位错线。结果表明,由于n/sup +/-衬底泄漏导致的失效与位错密度成正比。通过消除电池板和转移栅之间的砷注入,大大降低了由于泄漏引起的失效。产量也得到了提高。
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A new technique for imaging the logic state of passivated conductors: biased resistive contrast imaging (CMOS devices) TEM analysis of failed bits and improvement of data retention properties in megabit-DRAMS Relation between thehot carrier lifetime of transistors and CMOS SRAM products A model for EPROM intrinsic charge loss through oxide-nitride-oxide (ONO) interpoly dielectric Error analysis for optimal design of accelerated tests (electromigration)
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