Nianquan Ran, Jia Li, Shuaizhe Ma, Yuye Yang, Wanqing Zhao, Hao Li, Dan Li
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引用次数: 0
Abstract
With the determination of the 50Gb/s PON communication network standard, there is a large demand for 50Gb/s PON chips. In this paper, we design a 50Gb/s transimpedance amplifier (TIA) chip with very low power consumption, which greatly reduces the manufacturing cost by adopting the 40nm standard CMOS process. In the high gain mode, the transimpedance gain is 66.0dBΩ and the bandwidth is 30.4GHz. In the low gain mode, the transimpedance is 52.4dBΩ and the bandwidth is 34.1GHz. The input signal range can reach 2mA at most and the maximum differential output swing is 440mVpp. The receiver front-end circuit consumes 23.4mW, and the energy efficiency is 0.47pJ/bit.
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