High-spatial-frequency MOS transistor gate length variations in SRAM circuits

X. Ouyang, T. Deeter, C. N. Berglund, R. Pease, M. McCord
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引用次数: 2

Abstract

SRAM circuits have been used as electrical test structures to study short range spatial variations of MOS transistor effective gate length. Layout-dependent periodic errors were found to take up 30% to 90% of the total observed error variance, depending on the spatial frequency range and specific measurement grid used. Peaks in the measured gate-length error spatial spectrum were related to the periodicities existing in the circuit layout, and lithography simulations were done to identify the error sources. It was found that proximity effects, overlay errors due to stepper lens aberration, and pattern dependent coma effects contributed to a large percentage of the high spatial frequency errors observed.
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SRAM电路中高空间频率MOS晶体管栅极长度的变化
采用SRAM电路作为电学测试结构,研究了MOS晶体管有效栅极长度的短距离空间变化。根据空间频率范围和使用的特定测量网格,发现与布局相关的周期性误差占总观测误差方差的30%至90%。测量的门长误差空间谱峰与电路布局中存在的周期性有关,并通过光刻模拟来识别误差源。研究发现,接近效应、步进透镜像差引起的叠加误差和模式依赖的彗差效应是导致高空间频率误差的主要原因。
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