A High-Conversion-Ratio and 97.4% Peak-Efficiency 3-Switch Boost Converter with Duty-Dependent Charge Topology for 1.2A High Driving Current and 20% Reduction of Inductor DC Current in MiniLED Applications

Yen-An Lin, Si-Yi Li, Zheng-Lun Huang, Chong-Sin Huang, Chin-Hsiang Liang, Kai-Syun Chang, Kai-Cheng Chung, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai
{"title":"A High-Conversion-Ratio and 97.4% Peak-Efficiency 3-Switch Boost Converter with Duty-Dependent Charge Topology for 1.2A High Driving Current and 20% Reduction of Inductor DC Current in MiniLED Applications","authors":"Yen-An Lin, Si-Yi Li, Zheng-Lun Huang, Chong-Sin Huang, Chin-Hsiang Liang, Kai-Syun Chang, Kai-Cheng Chung, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai","doi":"10.1109/ISSCC42613.2021.9365797","DOIUrl":null,"url":null,"abstract":"Today’s miniLED displays can be divided into multiple arrays. Each miniLED array with 900 pixels can have 60 channels where each channel has 15 LEDs connected in series. To drive multi-channel miniLEDs in parallel from a low input voltage $\\mathrm{V}_{\\mathrm{I}\\mathrm{N}}$(=6V), a boost converter with high output voltage (up to 30V) and high output current (up to 1. 2A for 2000 nits) is required where the conversion ratio (CR $=\\mathrm{V}_{0\\cup \\mathrm{T}}/\\mathrm{V}_{\\mathrm{I}\\mathrm{N}}$) is 5. Since the inductor current $I_{L}=I_{LOAD}/(1-D)$ of the conventional 2-switch (2S) boost converter is high, where $\\mathrm{I}_{\\mathrm{L}0\\mathrm{A}\\mathrm{D}}$ is the load current and D is the duty cycle, 2S boost converters have low efficiency and high output voltage ripple. AIthough the boost converter assisted by a series flying capacitor $\\mathrm{C}_{\\mathrm{F}}$ can reduce the inductor current level to improve efficiency [1] –[5], $\\mathrm{C}_{\\mathrm{F}}$ lacks energy under high CR and high loading conditions. At the top of Fig. 17.9.1, both techniques in [1] and [2] charge the $\\mathrm{C}_{\\mathrm{F}}$ during $\\varphi$ 2. ln case of high CR, the duration of $\\varphi$ 2 becomes small to seriously affect the charging time. Hence, due to insufficient charge stored in $\\mathrm{C}_{\\mathrm{F}}$, the driving capability will decrease. At no load (left of Fig. 17.9.2), [1] fails to regulate and D is 0.87 in [2] to haveCR=5. lnterestingly, both$$ [1] and [2] fail to have CR=5 at load current =1.2A. AIthough additional dual channel-interleaved three-level buck-boost (DTLBB) structure in [1] can alternatively charge two flying capacitors, the hardware overhead is double and the quiescent current becomes high.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC42613.2021.9365797","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

Today’s miniLED displays can be divided into multiple arrays. Each miniLED array with 900 pixels can have 60 channels where each channel has 15 LEDs connected in series. To drive multi-channel miniLEDs in parallel from a low input voltage $\mathrm{V}_{\mathrm{I}\mathrm{N}}$(=6V), a boost converter with high output voltage (up to 30V) and high output current (up to 1. 2A for 2000 nits) is required where the conversion ratio (CR $=\mathrm{V}_{0\cup \mathrm{T}}/\mathrm{V}_{\mathrm{I}\mathrm{N}}$) is 5. Since the inductor current $I_{L}=I_{LOAD}/(1-D)$ of the conventional 2-switch (2S) boost converter is high, where $\mathrm{I}_{\mathrm{L}0\mathrm{A}\mathrm{D}}$ is the load current and D is the duty cycle, 2S boost converters have low efficiency and high output voltage ripple. AIthough the boost converter assisted by a series flying capacitor $\mathrm{C}_{\mathrm{F}}$ can reduce the inductor current level to improve efficiency [1] –[5], $\mathrm{C}_{\mathrm{F}}$ lacks energy under high CR and high loading conditions. At the top of Fig. 17.9.1, both techniques in [1] and [2] charge the $\mathrm{C}_{\mathrm{F}}$ during $\varphi$ 2. ln case of high CR, the duration of $\varphi$ 2 becomes small to seriously affect the charging time. Hence, due to insufficient charge stored in $\mathrm{C}_{\mathrm{F}}$, the driving capability will decrease. At no load (left of Fig. 17.9.2), [1] fails to regulate and D is 0.87 in [2] to haveCR=5. lnterestingly, both$$ [1] and [2] fail to have CR=5 at load current =1.2A. AIthough additional dual channel-interleaved three-level buck-boost (DTLBB) structure in [1] can alternatively charge two flying capacitors, the hardware overhead is double and the quiescent current becomes high.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
一种高转换比和97.4%峰值效率的3开关升压转换器,具有占空电荷相关拓扑,用于1.2A高驱动电流和减少20%的电感直流电流
今天的微型显示器可以分成多个阵列。每个900像素的迷你阵列可以有60个通道,每个通道有15个串联的led。为了从低输入电压$\ mathm {V}_{\ mathm {I}\ mathm {N}}$(=6V),高输出电压(高达30V)和高输出电流(高达1v)的升压转换器驱动多通道迷你二极管并联。当转换比率(CR $=\ mathm {V}_{0\cup \ mathm {T}}/\ mathm {V}_{\ mathm {I}\ mathm {N}}$)为5时,需要2A。由于传统2S升压变换器的电感电流$I_{L}=I_{LOAD}/(1-D)$较大,其中$\mathrm{I}_{\mathrm{L}0\mathrm{A}\mathrm{D} $为负载电流,D为占空比,导致2S升压变换器效率低,输出电压纹波大。虽然在串联飞行电容$\mathrm{C}_{\mathrm{F}}$的辅助下升压变换器可以降低电感电流水平以提高效率[1]~[5],但在高CR和高负载条件下,$\mathrm{C}_{\mathrm{F}}$缺乏能量。在图17.9.1的顶部,[1]和[2]中的两种技术都在$\varphi$ 2期间收取$\ mathm {C}_{\ mathm {F}}$。在CR高的情况下,$\varphi$ 2的持续时间变短,严重影响充电时间。因此,由于$\mathrm{C}_{\mathrm{F}}$中存储的电量不足,导致驱动能力下降。空载时(图17.9.2左侧),[1]无法调节,[2]中的D为0.87,使得ecr =5。有趣的是,在负载电流=1.2A时,$$[1]和[2]都没有CR=5。虽然[1]中附加的双通道交错三电平降压升压(DTLBB)结构可以对两个飞行电容器交替充电,但硬件开销增加一倍,静态电流变大。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
10.6 A 12b 16GS/s RF-Sampling Capacitive DAC for Multi-Band Soft-Radio Base-Station Applications with On-Chip Transmission-Line Matching Network in 16nm FinFET A 0.021mm2 PVT-Aware Digital-Flow-Compatible Adaptive Back-Biasing Regulator with Scalable Drivers Achieving 450% Frequency Boosting and 30% Power Reduction in 22nm FDSOI Technology 8.1 A 224Gb/s DAC-Based PAM-4 Transmitter with 8-Tap FFE in 10nm CMOS 14.7 An Adaptive Analog Temperature-Healing Low-Power 17.7-to-19.2GHz RX Front-End with ±0.005dB/°C Gain Variation, <1.6dB NF Variation, and <2.2dB IP1dB Variation across -15 to 85°C for Phased-Array Receiver ISSCC 2021 Index to Authors
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1