F. Pancher, Vanessa Vargas, P. Ramos, R. P. Bastos, David César Ardiles Saravia, R. Velazco
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引用次数: 1
Abstract
Software fault tolerance techniques can be applied to multi or many-core processors benefitting of the multiplicity of cores. The MPPA Coolidge many-core processor developed by KALRAY (Grenoble, France) was selected in the frame of OVNIPROM1 project as a target for the implementation of the N-Modular Redundancy and M-Partitions (NMR-MPar) fault tolerance technique developed at TIMA. This paper describes the implementation of this technique applied to the MPPA processor for its use as the heart of a nanosatellite On-Board Computer (OBC) to deal with errors produced by radiation effects.
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