A stochastic heuristic based approach to test vector reordering for dynamic test power reduction

Sanjoy Mitra, Debaprasad Das
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Abstract

With the growth of IC technology, power minimization has become a serious concern for the test engineers. Power consumption in test mode is comparatively higher than in functional mode. This high power consumption during testing may generate too much heat which in turn can spoil the circuit under test. Considering the spectrum of low power testing approaches, reduction in dynamic power is viewed here as a sub-problem and resolved through test vector reordering. In this paper, an Enhanced Ant Colony Optimization (EACO) heuristic is applied to sort out an optimal order of test vectors so that switching activity during testing gets lessened. The simulation on ISCAS 85 bench mark test data set has shown promising power reduction when compared with simple ant colony optimization (ACO) and other relevant heuristic approaches.
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一种基于随机启发式的测试向量重排序方法,用于动态降低测试功率
随着集成电路技术的发展,功耗最小化已成为测试工程师关注的问题。测试模式下的功耗相对高于功能模式下的功耗。测试过程中的高功耗可能会产生过多的热量,从而损坏被测电路。考虑到低功耗测试方法的频谱,动态功率的降低在这里被视为一个子问题,并通过测试向量重新排序来解决。本文采用一种增强蚁群优化启发式算法来排序测试向量的最优顺序,以减少测试过程中的切换活动。在ISCAS 85基准测试数据集上的仿真结果表明,与简单蚁群优化(ACO)和其他相关启发式算法相比,该算法具有较好的功耗降低效果。
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