Bo Liu, Shisheng Guo, Hai Qin, Yu Gong, Jinjiang Yang, Wei-qi Ge, Jun Yang
{"title":"An Energy-efficient Reconfigurable Hybrid DNN Architecture for Speech Recognition with Approximate Computing","authors":"Bo Liu, Shisheng Guo, Hai Qin, Yu Gong, Jinjiang Yang, Wei-qi Ge, Jun Yang","doi":"10.1109/ICDSP.2018.8631826","DOIUrl":null,"url":null,"abstract":"This paper proposes an hybrid deep neural network (DNN) for speech recognition and an energy-efficient reconfigurable architecture with approximate computing for accelerating the DNN. The hybrid DNN consists of two network models: a binary weight network (BWN) for twenty key words recognition; a recurrent neural network (RNN) for processing acoustic model of high precision common words recognition. To accelerate the hybrid DNN and reduce the energy cost, we propose a digital-analog mixed reconfigurable architecture with approximate computing units, including: a BWN accelerator with analog multi-chain delay-addition units for bit-wise approximate computing, and a RNN accelerator with approximate multiplication units for different calculation accuracy requirements. Implementation and simulation with TSMC 28nm HPC+ process technology, the energy efficiency of proposed architecture can achieves 163.8TOPS/W for twenty key words recognition and 3.3TOPS/W for common words recognition. Comparing with State-of-the-Art architectures, this work achieves over 1.7X better in energy efficiency with approximate computing.","PeriodicalId":218806,"journal":{"name":"2018 IEEE 23rd International Conference on Digital Signal Processing (DSP)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 23rd International Conference on Digital Signal Processing (DSP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICDSP.2018.8631826","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper proposes an hybrid deep neural network (DNN) for speech recognition and an energy-efficient reconfigurable architecture with approximate computing for accelerating the DNN. The hybrid DNN consists of two network models: a binary weight network (BWN) for twenty key words recognition; a recurrent neural network (RNN) for processing acoustic model of high precision common words recognition. To accelerate the hybrid DNN and reduce the energy cost, we propose a digital-analog mixed reconfigurable architecture with approximate computing units, including: a BWN accelerator with analog multi-chain delay-addition units for bit-wise approximate computing, and a RNN accelerator with approximate multiplication units for different calculation accuracy requirements. Implementation and simulation with TSMC 28nm HPC+ process technology, the energy efficiency of proposed architecture can achieves 163.8TOPS/W for twenty key words recognition and 3.3TOPS/W for common words recognition. Comparing with State-of-the-Art architectures, this work achieves over 1.7X better in energy efficiency with approximate computing.