N. Yokoyama, H. Onodera, T. Shinoki, H. Ohnishi, H. Nishi, A. Shibatomi
{"title":"A 3ns GaAs 4K×1b SRAM","authors":"N. Yokoyama, H. Onodera, T. Shinoki, H. Ohnishi, H. Nishi, A. Shibatomi","doi":"10.1109/ISSCC.1984.1156623","DOIUrl":null,"url":null,"abstract":"A 3ns 700mW GaAs 4K × 1b SRAM using tungsten-silicide gate, self-aligned technology, will be described. The development uses 1.5μm gates, E/D direct coupled FET logic and 2μm line-width metalization.","PeriodicalId":260117,"journal":{"name":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1984.1156623","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A 3ns 700mW GaAs 4K × 1b SRAM using tungsten-silicide gate, self-aligned technology, will be described. The development uses 1.5μm gates, E/D direct coupled FET logic and 2μm line-width metalization.
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