A parallel architecture for rapid prototyping of mechatronic algorithms by exploiting implicit fine-grain parallelism

Abstract

The paper presents an array architecture for rapid prototyping of mechatronic algorithms. The requirements for high throughput of arbitrary irregular real-time algorithms are supported by adopting the data-driven principle, exploiting the implicit fine grain parallelism, providing a high degree of scalability, and offering large flexibility in system configuration. Interconnection between neighboring processing elements of the array is implemented by a static hardware controlled network, whereas communication between spatial separated elements is provided by two dynamic global networks. Besides an overview of the architecture design, an algorithm mapping example illustrates implementation of a time-critical mechatronic application using the novel wavefront mapping algorithm.