{"title":"A Novel Speed Control for DC Motors: Sliding Mode Control, Fuzzy Inference System, Neural Networks and Genetic Algorithms","authors":"P. Cepeda, P. Ponce, A. Molina","doi":"10.1109/MICAI.2012.32","DOIUrl":null,"url":null,"abstract":"DC motors have been leading the field of adjustable speed drives for a long time due to its excellent control characteristics. This paper addresses a novel speed control application for DC motors gathering the features of Sliding Mode Control (SMC), Fuzzy Inference System (FIS), Neural Networks (NNs) and Genetic Algorithms (GAs). The main goal about combining these techniques is to create a robust speed controller avoiding the main disadvantage of SMC, the chattering. The design of the controller is implemented on a FPGA (Field Programmable Gate Array) and the steps for carrying out the implementation are described in detail. Finally, the results show a comparison between three different schemes of the designed controller.","PeriodicalId":348369,"journal":{"name":"2012 11th Mexican International Conference on Artificial Intelligence","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 11th Mexican International Conference on Artificial Intelligence","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MICAI.2012.32","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
DC motors have been leading the field of adjustable speed drives for a long time due to its excellent control characteristics. This paper addresses a novel speed control application for DC motors gathering the features of Sliding Mode Control (SMC), Fuzzy Inference System (FIS), Neural Networks (NNs) and Genetic Algorithms (GAs). The main goal about combining these techniques is to create a robust speed controller avoiding the main disadvantage of SMC, the chattering. The design of the controller is implemented on a FPGA (Field Programmable Gate Array) and the steps for carrying out the implementation are described in detail. Finally, the results show a comparison between three different schemes of the designed controller.
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