Flexible hardware architecture for 2-D separable scaling using convolution interpolation

Abstract

There is not a single scaling technique that suites all kind of images. Final image quality (IQ) depends not only on the scale factor but also on the type of image (photo, CAD, text...) the user is willing to print or display. Formally, any scaling operation can be interpreted as a combination of an anti-alias filter and an interpolation by continuous convolution. In this paper we present a hardware architecture based on this formal framework that performs two dimensional (2-D) separable image up- and down-scaling with a high degree of flexibility and a low hardware cost. In particular, in this paper we propose a convolution interpolator with a programmable kernel memory, we develop a design rule for optimizing the kernel coefficient memory size and we report a flexible anti-alias filter. The increased flexibility provided by the combination of the aforementioned elements renders superior IQ since the scaling technique and parameters can be adjusted to each specific type of image.