{"title":"Thermal/Traffic Mutual-Coupling Co-simulation Platform for 3D Network-on-Chip (NoC) Designs","authors":"A. Wu, K. Chen, Chih-Hao Chao","doi":"10.1145/3139540.3139549","DOIUrl":null,"url":null,"abstract":"Three-dimensional Network-on-Chip (3D NoC), the combination of NoC and 3D IC technology, can achieve lower latency, lower power consumption, and higher data bandwidth for efficient intra/inter-chip data exchange of chip multiprocessors (CMPs). Due to die stacking in 3D IC, both heat conduction path and power density increase. Therefore, thermal issue becomes the major design challenges in the research field of three-dimensional (3D) IC. To facilitate such research, an accurate and non-proprietary environment for simulating the traffic and temperature behavior in 3D NoC is necessary. In this tutorial, one traffic-thermal mutual-coupling co-simulation platform for 3D NoC will be presented. The introduced platform can be used for 3D thermal-aware design, 3D dynamic thermal management technology, and other related researches in the future.","PeriodicalId":410968,"journal":{"name":"Proceedings of the 10th International Workshop on Network on Chip Architectures","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 10th International Workshop on Network on Chip Architectures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3139540.3139549","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Three-dimensional Network-on-Chip (3D NoC), the combination of NoC and 3D IC technology, can achieve lower latency, lower power consumption, and higher data bandwidth for efficient intra/inter-chip data exchange of chip multiprocessors (CMPs). Due to die stacking in 3D IC, both heat conduction path and power density increase. Therefore, thermal issue becomes the major design challenges in the research field of three-dimensional (3D) IC. To facilitate such research, an accurate and non-proprietary environment for simulating the traffic and temperature behavior in 3D NoC is necessary. In this tutorial, one traffic-thermal mutual-coupling co-simulation platform for 3D NoC will be presented. The introduced platform can be used for 3D thermal-aware design, 3D dynamic thermal management technology, and other related researches in the future.