Delay and slew analysis of VLSI interconnects using difference model approach

Abstract

In high speed digital integrated circuits, inductive- coupling effects in interconnects can be significant and should be included for accurate delay-noise analysis. In this paper, an analytical framework to model delay and slew metrics in coupled RLC interconnects is presented. The proposed models are based on difference model approach which involves the dynamic part of system transfer function. The models are generic in nature and can be applied to symmetric driver-and-line configurations for aggressor and victim wires. The model is compared against SPICE simulations and is shown to capture delay and slew accurately. Over a large set of random test cases, the average error in delay and slew estimation is approximately 1.8% and 3.2% respectively. A key feature of the new model is that its derivation and form enables an insight into the inductively coupled noise-waveform. Due to its simplicity and physical nature, the proposed model can be applied to asymmetric transmission lines. The obtained results indicate that common (capacitive) noise-avoidance techniques can behave quite differently when capacitive and inductive coupling are considered together.