Managing don't cares in Boolean satisfiability

Sean Safarpour, A. Veneris, R. Drechsler, Joanne Lee
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引用次数: 30

Abstract

Advances in Boolean satisfiability solvers have popularized their use in many of today's CAD VLSI challenges. Existing satisfiability solvers operate on a circuit representation that does not capture all of the structural circuit characteristics and properties. This work proposes algorithms that take into account the circuit don't care conditions thus enhancing the performance of these tools. Don't care sets are addressed in this work both statically and dynamically to reduce the search space and guide the decision making process. Experiments demonstrate performance gains.
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管理并不关心布尔的可满足性
布尔可满足性解算器的进步已经普及了它们在当今许多CAD VLSI挑战中的应用。现有的可满足性求解器在电路表示上运行,不能捕获所有结构电路的特征和属性。这项工作提出了考虑电路不关心条件的算法,从而提高了这些工具的性能。在这项工作中,不关心集被静态和动态地处理,以减少搜索空间并指导决策过程。实验证明了性能的提高。
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