Evaluation of a refinement-driven systemC/spl trade/-based design flow

T. Schubert, J. Hanisch, J. Gerlach, Appell J-E, W. Nebel
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Abstract

This paper describes the experiences and results that were made with a systemC-based design flow for the implementation of an automotive digital hardware design. We present the refinement process starting from an initial high-level executable specification in C++ via systemC down to a gate-level description. We compare the synthesis results of the systemC-based system-level design flow with those from a traditional VHDL-based register-transfer level design flow in terms of efficiency and simulation performance.
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一个精细化驱动的系统/spl基于贸易/设计流程的评估
本文介绍了用基于systemc的设计流程实现汽车数字化硬件设计的经验和结果。我们展示了细化过程,从c++中初始的高级可执行规范开始,通过systemC一直到门级描述。我们在效率和仿真性能方面比较了基于systemc的系统级设计流程与传统基于vhdl的寄存器传输级设计流程的综合结果。
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RTL power optimisation: concepts, tools and design experiences [Tutorial] Reliable design: a system perspective [Tutorial] Evaluation of a refinement-driven systemC/spl trade/-based design flow The coming of age of reconfigurable computing-potentials and challenges of a new technology [Tutorial] Breaking the synchronous barrier for systems-on-chip communication and synchronisation [Tutorial]
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