A 65nm 4MB embedded flash macro for automotive achieving a read throughput of 5.7GB/s and a write throughput of 1.4MB/s

Mihail Jefremow, T. Kern, Ulrich Backhausen, J. Elbs, B. Rousseau, Christoph Roll, L. Castro, T. Roehr, E. Paparisto, K. Herfurth, R. Bartenschlager, Stefanie Thierold, R. Renardy, Stephan Kassenetter, N. Lawal, M. Strasser, W. Trottmann, D. Schmitt-Landsiedel
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引用次数: 4

Abstract

This paper presents a 65nm embedded flash macro for automotive applications with read and write throughput of 5.7GB/s and 1.4MB/s respectively. The high read throughput rate is achieved by using the multi voltage domain multiplexer design enabling a low voltage read path and the local ground referenced read circuit design utilizing the robust time domain source side sense amplifier (SoSiSA) [1]. This allows low voltage sub 50mV swing read operation for high speed read-out under more than 30mV system noise. The hot source triple poly (HS3P) embedded flash memory cell [2] allows sub 5μs low current write operation enabling high write throughput up to a junction temperature of 170°C.
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一个65nm的4MB嵌入式汽车闪存宏实现了5.7GB/s的读取吞吐量和1.4MB/s的写入吞吐量
本文提出了一种用于汽车应用的65nm嵌入式闪存宏,其读写吞吐量分别为5.7GB/s和1.4MB/s。高读取吞吐量是通过使用多电压域多路复用器设计实现低电压读取路径和使用鲁棒时域源侧检测放大器(SoSiSA)[1]的本地接地参考读取电路设计来实现的。这允许低电压低于50mV的摆幅读取操作,在超过30mV的系统噪声下高速读出。热源三聚(HS3P)嵌入式快闪记忆体单元[2]允许低于5μs的低电流写入操作,可实现高达170°C结温的高写入吞吐量。
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