Low power and high speed level translator using Widlar topology

Nithia Shree A C, M. R, Arul A, S. Ramesh
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Abstract

This study examines two different forms of energy-saving and rapid voltage level changers are designed in this research. This article provides comprehensive information on logic down shifters and logic up shifter. The placement of level shifter plays crucial role, the low to high level shifters requires single supply voltage whereas high to low level shifter requires dual supply voltage. Level shifters have been developed using gpdk 45nm technology. The level changer design described in this paper can transform input voltages from sub-threshold levels to the desired voltage supply. The level shifter can convert high voltage (VVDH) to low voltage (VVDL) and vice versa. The level shifter designed here using Widlar current mirror instead of Wilson current mirror. Due to the development of highly efficient and low power consumption application, it is important to manage a complex circuit with minimal power consumption to achieve, the best method for lowering system-level power usage is multi supply voltage domain. For interconnection of ICs and to avoid static current and to accommodate supply voltage configurations, level translators (LSs) must be used. The designed level shifters are simulated using Cadence tool
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采用Widlar拓扑结构的低功耗和高速转换器
本研究探讨了两种不同形式的节能型和快速电压电平转换器。本文提供了逻辑下移位器和逻辑上移位器的综合信息。电平移位器的位置起着至关重要的作用,低电平到高电平的移位器需要单电源电压,而高电平到低电平的移位器需要双电源电压。利用gpdk 45nm技术开发了电平移动器。本文描述的电平转换器设计可以将输入电压从亚阈值电平转换为所需的电压源。电平转换器可以将高压(VVDH)转换为低压(VVDL),反之亦然。本文设计的电平转换器采用威德勒电流反射镜代替威尔逊电流反射镜。随着高效、低功耗应用的发展,以最小的功耗管理复杂电路变得非常重要,降低系统级功耗的最佳方法是多电源电压域。对于集成电路的互连,为了避免静态电流和适应电源电压配置,必须使用电平转换器(LSs)。利用Cadence工具对所设计的电平移位器进行了仿真
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