{"title":"A 622 Mb/s fully-integrated optical IC with a wide range input","authors":"T. Takeshita, T. Nishimura","doi":"10.1109/ISSCC.2002.992217","DOIUrl":null,"url":null,"abstract":"An optical receiver IC for 622 Mb/s that integrates transimpedance amplifier, post amplifier, and clock recovery uses a BiCMOS process. The single-chip receiver achieves dynamic range sensitivity from -29.4 to 0 dBm. A PLL circuit without reference-clock tolerates input with duty-cycle distortion from 70 to 130%.","PeriodicalId":423674,"journal":{"name":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2002.992217","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
An optical receiver IC for 622 Mb/s that integrates transimpedance amplifier, post amplifier, and clock recovery uses a BiCMOS process. The single-chip receiver achieves dynamic range sensitivity from -29.4 to 0 dBm. A PLL circuit without reference-clock tolerates input with duty-cycle distortion from 70 to 130%.
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