M. Hossain, M. Eissa, M. Hrobak, D. Stoppel, N. Weimann, A. Malignaggi, A. Mai, D. Kissinger, W. Heinrich, V. Krozer
{"title":"A Hetero-Integrated W-Band Transmitter Module in InP-on-BiCMOS Technology","authors":"M. Hossain, M. Eissa, M. Hrobak, D. Stoppel, N. Weimann, A. Malignaggi, A. Mai, D. Kissinger, W. Heinrich, V. Krozer","doi":"10.23919/EUMIC.2018.8539915","DOIUrl":null,"url":null,"abstract":"This paper presents a W -band hetero-integrated transmitter module using InP-on-BiCMOS technology. It consists of a Phase Locked Loop (PLL) in 0.25 μm BiCMOS technology and a frequency multiplier followed by a double-balanced Gilbert mixer cell in 0.8 μm InP-HBT technology, which is integrated on top of the BiCMOS MMIC in a wafer-level BCB bonding process. The PLL operates from 45 GHz to 47 GHz and the module achieves a measured single sideband (SSB) power conversion loss of 20 dB and 22 dB at 88 GHz and 95 GHz, respectively, limited by the output power from the PLL source. The entire circuit consumes 434 mW DC power. The chip area of the module is 2.5×1.3 mm2, To the knowledge of the authors, this is the first complex hetero-Integrated module reported so far.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"371 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/EUMIC.2018.8539915","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents a W -band hetero-integrated transmitter module using InP-on-BiCMOS technology. It consists of a Phase Locked Loop (PLL) in 0.25 μm BiCMOS technology and a frequency multiplier followed by a double-balanced Gilbert mixer cell in 0.8 μm InP-HBT technology, which is integrated on top of the BiCMOS MMIC in a wafer-level BCB bonding process. The PLL operates from 45 GHz to 47 GHz and the module achieves a measured single sideband (SSB) power conversion loss of 20 dB and 22 dB at 88 GHz and 95 GHz, respectively, limited by the output power from the PLL source. The entire circuit consumes 434 mW DC power. The chip area of the module is 2.5×1.3 mm2, To the knowledge of the authors, this is the first complex hetero-Integrated module reported so far.