Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539902
Onur Memioglu, A. Karakuzulu, A. Gundel, F. Koçer, O. Aydin Civi
This paper describes the design and verification results of two wideband class AB High Power Amplifiers (PA), encapsulated in commercial packages. Both amplifiers designed on WIN Semiconductors' 0.25 $mu$ m GaN on SiC technology. The selected GaN process features compact common-source (CS) transistor layouts with individual source grounding vias. The family spans the whole X-band frequency with the first design tuned between 7–11 GHz and the second design tuned between 10–12 GHz. Both designs have saturated power output greater than 25 W throughout the whole bandwidth with peak power added efficiency at 30%. A multistage power combining matching strategy to achieve a tradeoff in wideband performance and power output is given. In depth discussion of the MMIC design of the PAs is supported by a discussion of the thermal management of the packages, including the PCB design and active cooling methodology, in order to present a fully functional PA family.
本文介绍了两种商用封装的宽带AB类大功率放大器(PA)的设计和验证结果。两款放大器均采用WIN半导体的0.25美元/ μ美元GaN on SiC技术设计。所选择的GaN工艺具有紧凑的共源(CS)晶体管布局，具有单独的源接地过孔。该系列跨越整个x波段频率，第一种设计在7-11 GHz之间调谐，第二种设计在10-12 GHz之间调谐。这两种设计在整个带宽内的饱和功率输出都大于25w，峰值功率增加效率为30%。提出了一种多级功率组合匹配策略，以实现宽带性能和功率输出的平衡。为了呈现一个功能齐全的PA系列，在对PA的MMIC设计进行深入讨论的同时，还讨论了封装的热管理，包括PCB设计和主动冷却方法。
{"title":"Design and Implementation of an Encapsulated GaN X-Band Power Amplifier Family","authors":"Onur Memioglu, A. Karakuzulu, A. Gundel, F. Koçer, O. Aydin Civi","doi":"10.23919/EUMIC.2018.8539902","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539902","url":null,"abstract":"This paper describes the design and verification results of two wideband class AB High Power Amplifiers (PA), encapsulated in commercial packages. Both amplifiers designed on WIN Semiconductors' 0.25 $mu$ m GaN on SiC technology. The selected GaN process features compact common-source (CS) transistor layouts with individual source grounding vias. The family spans the whole X-band frequency with the first design tuned between 7–11 GHz and the second design tuned between 10–12 GHz. Both designs have saturated power output greater than 25 W throughout the whole bandwidth with peak power added efficiency at 30%. A multistage power combining matching strategy to achieve a tradeoff in wideband performance and power output is given. In depth discussion of the MMIC design of the PAs is supported by a discussion of the thermal management of the packages, including the PCB design and active cooling methodology, in order to present a fully functional PA family.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116102032","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/eumc.2018.8541612
T. Shimura, T. Ohshima, Shohei Ishikawa, Shunsuke Fujio, Kazuyuki Ozaki, H. Ishikawa, Ken-ichi Nishikawa, M. Shimizu, Y. Ohashi
We propose a transmitter configuration with a phase-adjusting function between subarrays for beam multiplexing. We demonstrate a 28-GHz CMOS phased array chip with a phase-adjusting function for a beam-multiplexing transmitter. The phased array chip has two subarrays, each having four transmit channels to accurately set output phases and amplitudes via a multi-channel 10-bit-resolution digital-to-analog converter. The phase-setting resolution of the chip is less than 1.0°. The phase array chip also has nine mixers for detecting the phase difference between subarrays in the chip, between channels in the subarray, and between the chip and another chip. The measured root-mean-square (RMS) output phase error and the measured RMS phase-difference detection error of the chip are both 0.7°. Using this chip with a high-precision phase-adjusting function, it is possible to realize a transmitter with a signal-to-interference ratio of over 25 dB for beam multiplexing. We also propose an antenna configuration for two-dimensional beam scanning and horizontal beam multiplexing using the phased array chips.
{"title":"A 28-GHz CMOS 2×4 Phased Array Chip with High-Precision Phase-Adjusting Function Between Subarrays for Beam Multiplexing","authors":"T. Shimura, T. Ohshima, Shohei Ishikawa, Shunsuke Fujio, Kazuyuki Ozaki, H. Ishikawa, Ken-ichi Nishikawa, M. Shimizu, Y. Ohashi","doi":"10.23919/eumc.2018.8541612","DOIUrl":"https://doi.org/10.23919/eumc.2018.8541612","url":null,"abstract":"We propose a transmitter configuration with a phase-adjusting function between subarrays for beam multiplexing. We demonstrate a 28-GHz CMOS phased array chip with a phase-adjusting function for a beam-multiplexing transmitter. The phased array chip has two subarrays, each having four transmit channels to accurately set output phases and amplitudes via a multi-channel 10-bit-resolution digital-to-analog converter. The phase-setting resolution of the chip is less than 1.0°. The phase array chip also has nine mixers for detecting the phase difference between subarrays in the chip, between channels in the subarray, and between the chip and another chip. The measured root-mean-square (RMS) output phase error and the measured RMS phase-difference detection error of the chip are both 0.7°. Using this chip with a high-precision phase-adjusting function, it is possible to realize a transmitter with a signal-to-interference ratio of over 25 dB for beam multiplexing. We also propose an antenna configuration for two-dimensional beam scanning and horizontal beam multiplexing using the phased array chips.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116515958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539945
H. Rashtian, O. Momeni
A band-pass gain-boosted distributed amplifier is proposed. The amplifier achieves a bandwidth of 90 GHz at center frequency of 97 GHz and operates up to frequencies as high as 0.67fmax of the transistors. A novel gain-boosted cascode structure as well as band-pass transmission lines are employed to significantly boost the bandwidth and the highest operation frequency of the amplifier. The amplifier shows an average gain of 14.4 dB from 52 GHz to 142 GHz in a 0.13-μm SiGe process with fmax of 210 GHz.
{"title":"A Gain-Boosted 52–142 GHz Band-Pass Distributed Amplifier in O.13μm SiGe Process with fmax of 210GHz","authors":"H. Rashtian, O. Momeni","doi":"10.23919/EUMIC.2018.8539945","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539945","url":null,"abstract":"A band-pass gain-boosted distributed amplifier is proposed. The amplifier achieves a bandwidth of 90 GHz at center frequency of 97 GHz and operates up to frequencies as high as 0.67fmax of the transistors. A novel gain-boosted cascode structure as well as band-pass transmission lines are employed to significantly boost the bandwidth and the highest operation frequency of the amplifier. The amplifier shows an average gain of 14.4 dB from 52 GHz to 142 GHz in a 0.13-μm SiGe process with fmax of 210 GHz.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123895422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539885
Jan Schoepfel, S. Kueppers, K. Aufinger, N. Pohl
In this paper a SiGe chipset for automotive applications in the band around 76 GHz is presented. The first MMIC contains a VCO at a frequency of 38 GHz for LO generation. The second MMIC encloses a complete transceiver at 76 GHz. The main goal of this work is to create a first functional version of a VCO and an one channel transceiver MMIC. With these MMICs it will be possible to build up multipurpose radar systems with a variable number of transceivers, to construct MIMO architectures. What makes this system innovative is the fact, that it is able to handle broader signals than know systems. Furthermore it isn't limited to one modulation scheme. It is possible to transmit and receive any signal form with platforms build out of these chips. The VCO MMIC achieves a tuning frequency range of 5 GHz with a center frequency of 35 GHz. It consumes 152 mW from a 3.3 V supply. The transceiver MMIC is fully functional and achieves a saturated output power of 9.5 dBm drawing 570 mW from a 3.3 V supply.
{"title":"A Multipurpose 76 GHz Radar Transceiver System for Automotive Applications Based on SiGe MMICs","authors":"Jan Schoepfel, S. Kueppers, K. Aufinger, N. Pohl","doi":"10.23919/EUMIC.2018.8539885","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539885","url":null,"abstract":"In this paper a SiGe chipset for automotive applications in the band around 76 GHz is presented. The first MMIC contains a VCO at a frequency of 38 GHz for LO generation. The second MMIC encloses a complete transceiver at 76 GHz. The main goal of this work is to create a first functional version of a VCO and an one channel transceiver MMIC. With these MMICs it will be possible to build up multipurpose radar systems with a variable number of transceivers, to construct MIMO architectures. What makes this system innovative is the fact, that it is able to handle broader signals than know systems. Furthermore it isn't limited to one modulation scheme. It is possible to transmit and receive any signal form with platforms build out of these chips. The VCO MMIC achieves a tuning frequency range of 5 GHz with a center frequency of 35 GHz. It consumes 152 mW from a 3.3 V supply. The transceiver MMIC is fully functional and achieves a saturated output power of 9.5 dBm drawing 570 mW from a 3.3 V supply.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114233007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539953
Takanobu Fujiwara, M. Shimozawa
In recent years, for the realization of the low-cost and multi-band AP AA (Active Phased Array Antenna) system, broadband and highly accurate vector-sum phase shifter has attracted the attention. To realize such a vector-sum phase shifter, one of the difficulty arises from the trade-off between a bandwidth and an insertion loss of the PPF (Poly Phase Filter) which is deployed at the first stage inside the phase shifter and generates quadrature signals from a differential signal. In order to ease the trade-off of PPF, we propose the PPF using inductor and capacitor (LC-type) power splitter implemented in front of it. Simulation results with the proposed technique show the improvement of 2.7dB in the insertion loss, without degradation of the bandwidth. As a proof of concept, vector-sum phase shifter with the proposed PPF technique was fabricated using 0.18um SiGe BiCMOS process. Measurement results showed the 3dB gain bandwidth of 64% at X-band and the RMS phase error of less than 2.1°. This broadband and highly accurate results show that the proposed PPF technique is effective to realize multi-band AP AA system in the near future.
{"title":"Broadband and Highly Accurate X-Band Vector-Sum Phase Shifter Using LC-Type Power Splitter","authors":"Takanobu Fujiwara, M. Shimozawa","doi":"10.23919/EUMIC.2018.8539953","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539953","url":null,"abstract":"In recent years, for the realization of the low-cost and multi-band AP AA (Active Phased Array Antenna) system, broadband and highly accurate vector-sum phase shifter has attracted the attention. To realize such a vector-sum phase shifter, one of the difficulty arises from the trade-off between a bandwidth and an insertion loss of the PPF (Poly Phase Filter) which is deployed at the first stage inside the phase shifter and generates quadrature signals from a differential signal. In order to ease the trade-off of PPF, we propose the PPF using inductor and capacitor (LC-type) power splitter implemented in front of it. Simulation results with the proposed technique show the improvement of 2.7dB in the insertion loss, without degradation of the bandwidth. As a proof of concept, vector-sum phase shifter with the proposed PPF technique was fabricated using 0.18um SiGe BiCMOS process. Measurement results showed the 3dB gain bandwidth of 64% at X-band and the RMS phase error of less than 2.1°. This broadband and highly accurate results show that the proposed PPF technique is effective to realize multi-band AP AA system in the near future.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132073858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539891
R. Dong, K. Katayama, K. Takano, Sangyeop Lee, T. Yoshida, S. Amakawa, M. Fujishima
A low-power W-band CMOS amplifier with a 0.35 V supply voltage is presented. It achieves a peak gain of 12.5 dB and consumes a power of 3.1 mW. However, the maximum available gain (MAG) or maximum stable gain (MSG) of transistor degrades markedly because of the low supply voltage and the near maximum oscillation frequency, fmax. Thus, gain-boosting techniques must be employed to enhance the transistor's gain. An intuitive method, which involves drawing a set of circles, was presented to explain how the feedback network boosts the MAG to its highest value (Gmax). The method was employed in the design of the amplifier with a 0.35 V supply voltage.
{"title":"79–85GHz CMOS Amplifier with 0.35V Supply Voltage","authors":"R. Dong, K. Katayama, K. Takano, Sangyeop Lee, T. Yoshida, S. Amakawa, M. Fujishima","doi":"10.23919/EUMIC.2018.8539891","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539891","url":null,"abstract":"A low-power W-band CMOS amplifier with a 0.35 V supply voltage is presented. It achieves a peak gain of 12.5 dB and consumes a power of 3.1 mW. However, the maximum available gain (MAG) or maximum stable gain (MSG) of transistor degrades markedly because of the low supply voltage and the near maximum oscillation frequency, fmax. Thus, gain-boosting techniques must be employed to enhance the transistor's gain. An intuitive method, which involves drawing a set of circles, was presented to explain how the feedback network boosts the MAG to its highest value (Gmax). The method was employed in the design of the amplifier with a 0.35 V supply voltage.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130258988","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539883
Yunshan Wang, Chun-Nien Chen, Yi-Ching Wu, Huei Wang
A variable gain low noise amplifier (VGLNA) for millimeter-wave (MMW) wireless communication is proposed in this paper. This VGLNA is implemented using 90-nm CMOS process. It shows small signal gain greater than 20.9 dB from 68.9 to 87.6 GHz with 2.5-dB variation and a dc consumption 56 mW. The gain control range is 2.3 to 21.1 dB at center frequency. The measured minimum noise figure (NF) is 5.3 dB at 80 GHz. This work shows the best noise performance of LNAs in 90-nm CMOS at similar frequencies and comparable figure of merit to those MMW LNAs in better IC process.
{"title":"An E-Band Variable Gain Low Noise Amplifier in 90-nm CMOS Process Using Body-Floating and Noise Reduction Techniques","authors":"Yunshan Wang, Chun-Nien Chen, Yi-Ching Wu, Huei Wang","doi":"10.23919/EUMIC.2018.8539883","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539883","url":null,"abstract":"A variable gain low noise amplifier (VGLNA) for millimeter-wave (MMW) wireless communication is proposed in this paper. This VGLNA is implemented using 90-nm CMOS process. It shows small signal gain greater than 20.9 dB from 68.9 to 87.6 GHz with 2.5-dB variation and a dc consumption 56 mW. The gain control range is 2.3 to 21.1 dB at center frequency. The measured minimum noise figure (NF) is 5.3 dB at 80 GHz. This work shows the best noise performance of LNAs in 90-nm CMOS at similar frequencies and comparable figure of merit to those MMW LNAs in better IC process.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124314781","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539866
M. Dinari, G. Mouginot, E. Byk, V. Brunel, C. Chang, L. Brunel, M. Camiade
This paper presents a wideband three stage monolithic HPA design and characterizations. It is realized on UMS 0.15 μm GaN technology on SiC substrate. The main challenge was to find a good trade-off between RF characteristics (power, Power Added Efficiency, gain flatness and Input/Output return loss in a wide frequency range), thermal characteristics, and chip size: this was achieved by combining distributed (first stage) and reactively matched (second and third stages) architectures. The characterization results show an output power from 5.5 W to 9 W, an average PAE of 22% and a small signal gain higher than 30 dB over the frequency band 5-18.5 GHz. These performances are obtained in test fixture, and in Continuous Wave mode (CW).
{"title":"Three Stage 5-18.5 GHz High Gain and High Power Amplifier Based on 0.15 μm GaN Technology","authors":"M. Dinari, G. Mouginot, E. Byk, V. Brunel, C. Chang, L. Brunel, M. Camiade","doi":"10.23919/EUMIC.2018.8539866","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539866","url":null,"abstract":"This paper presents a wideband three stage monolithic HPA design and characterizations. It is realized on UMS 0.15 μm GaN technology on SiC substrate. The main challenge was to find a good trade-off between RF characteristics (power, Power Added Efficiency, gain flatness and Input/Output return loss in a wide frequency range), thermal characteristics, and chip size: this was achieved by combining distributed (first stage) and reactively matched (second and third stages) architectures. The characterization results show an output power from 5.5 W to 9 W, an average PAE of 22% and a small signal gain higher than 30 dB over the frequency band 5-18.5 GHz. These performances are obtained in test fixture, and in Continuous Wave mode (CW).","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128155237","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539882
M. Alim, A. Rezazadeh, C. Gaquière
Detailed study of zero temperature coefficients (ZTC) for microwave GaAs and GaN based high electron mobility transistors were reported and analysed. The measured temperature-dependent data between −40 to 150°C were observed of transconductance and drain current for the both devices. It was found that the variation of threshold voltage (V T) with the drain bias (V ds) has an influence on zero temperature coefficient points. Furthermore, the drain current based ZTC point arises before VT for GaN and after VT for GaAs FETs with respect to drain bias. Inconsistency are observed; most conspicuously that the temperature trends of the threshold voltage for these two device technologies are utterly contrasting. In addition, transconductance based ZTC is absent in GaN device. Furthermore, the effective mobility is estimated using an improved model for the GaN device. The results indicate a well-confined 2-DEG with high mobility as the peak value of effective mobility closely corresponds with the Hall mobility. This work provides some worthwhile insights in microwave circuits design for high temperature applications.
{"title":"Detailed Study of Zero Temperature Coefficients for Microwave GaAs and GaN FETs","authors":"M. Alim, A. Rezazadeh, C. Gaquière","doi":"10.23919/EUMIC.2018.8539882","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539882","url":null,"abstract":"Detailed study of zero temperature coefficients (ZTC) for microwave GaAs and GaN based high electron mobility transistors were reported and analysed. The measured temperature-dependent data between −40 to 150°C were observed of transconductance and drain current for the both devices. It was found that the variation of threshold voltage (V T) with the drain bias (V ds) has an influence on zero temperature coefficient points. Furthermore, the drain current based ZTC point arises before VT for GaN and after VT for GaAs FETs with respect to drain bias. Inconsistency are observed; most conspicuously that the temperature trends of the threshold voltage for these two device technologies are utterly contrasting. In addition, transconductance based ZTC is absent in GaN device. Furthermore, the effective mobility is estimated using an improved model for the GaN device. The results indicate a well-confined 2-DEG with high mobility as the peak value of effective mobility closely corresponds with the Hall mobility. This work provides some worthwhile insights in microwave circuits design for high temperature applications.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129057879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539950
M. Rocio Moure, M. Casbon, M. Fernández-Barciela, P. Tasker
In the design of power amplifiers, it is necessary to model the transistor behaviour at high compression levels and accurately predict load-pull power and efficiency contours as well as harmonics. For this purpose, nonlinear behavioural model approaches have been successfully used, like Cardiff model. In this paper, a systematic study is presented on the complexity required for the Cardiff model to achieve a given precision when targeting different load-pull contour design requirements for a GaN HFET. The study has been performed through simulation and measurements and is aimed at providing a systematic approach to aid in the extraction of accurate and efficient Cardiff behavioural models.
{"title":"A Systematic Investigation of Behavioural Model Complexity Requirements","authors":"M. Rocio Moure, M. Casbon, M. Fernández-Barciela, P. Tasker","doi":"10.23919/EUMIC.2018.8539950","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539950","url":null,"abstract":"In the design of power amplifiers, it is necessary to model the transistor behaviour at high compression levels and accurately predict load-pull power and efficiency contours as well as harmonics. For this purpose, nonlinear behavioural model approaches have been successfully used, like Cardiff model. In this paper, a systematic study is presented on the complexity required for the Cardiff model to achieve a given precision when targeting different load-pull contour design requirements for a GaN HFET. The study has been performed through simulation and measurements and is aimed at providing a systematic approach to aid in the extraction of accurate and efficient Cardiff behavioural models.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131080566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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