M. Pulvirenti, G. Montoro, M. Nania, R. Scollo, G. Scelba, M. Cacciato, G. Scarcella, L. Salvo
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引用次数: 9
Abstract
The aim of this paper is the analysis of voltage spikes arising at the gate-source terminals during the commutation of Silicon Carbide (SiC) MOSFET Power Devices. The voltage spikes are noticed in a half bridge configuration and they can be appreciated when a SiC MOSFET is in off state while its complementary is PWM commutated. The influence of the device technology and its packaging on these transient overvoltages has been properly modeled including internal device and board parasitics. Moreover, wide experimental tests campaign have been performed highlighting pros and cons of different device packages.
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