A 11 ppm/°c CMOS current reference circuit with no external components

Damian Imbrea, N. Cojan
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引用次数: 4

Abstract

A new CMOS current reference circuit is described. The circuit designed in 65 nm CMOS standard process operates in the temperature range [-40...+130] °C with supply voltage from 2.1 V to 3.0 V. The reference current is 1 μA ± 0.9 nA having a line sensitivity of 0.5 nA/V and 200 dB power supply rejection ratio at low frequencies. No curvature compensation techniques are used. The circuit occupies 0.0091 mm2 silicon area.
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一个11 ppm/°c的CMOS电流参考电路,没有外部元件
介绍了一种新的CMOS电流基准电路。该电路采用65nm CMOS标准工艺设计,工作温度范围为[-40…+130°C,电源电压从2.1 V到3.0 V。参考电流为1 μA±0.9 nA,线路灵敏度为0.5 nA/V,低频电源抑制比为200db。不使用曲率补偿技术。电路的硅面积为0.0091 mm2。
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