{"title":"Symmetric and programmable multi-chip module for rapid prototyping system","authors":"Mao-Hsu Yen, Sao-Jie Chen, S. Lan","doi":"10.1109/SIPS.1999.822335","DOIUrl":null,"url":null,"abstract":"To accelerate prototyping designs, we propose a new Symmetric and Programmable MCM (SPMCM) substrate, which consists of a symmetrical array of slots for bare-chip attachment and Field Programmable Interconnect Chips (FPICs) for substrate routing. Especially, the FPIC that we developed contains two kinds of polygonal routing modules and some virtual-wires to reduce the number of routing switches and pin count. For a bare-chip slot with 2n pads, the number of switches used in the polygonal routing module is less than the conventional routing module by /spl radic/(rF/sub C/n)/4 times, where the flexibility ratio r(F/sub C/) is close to 1.","PeriodicalId":275030,"journal":{"name":"1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461)","volume":"635 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.1999.822335","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
To accelerate prototyping designs, we propose a new Symmetric and Programmable MCM (SPMCM) substrate, which consists of a symmetrical array of slots for bare-chip attachment and Field Programmable Interconnect Chips (FPICs) for substrate routing. Especially, the FPIC that we developed contains two kinds of polygonal routing modules and some virtual-wires to reduce the number of routing switches and pin count. For a bare-chip slot with 2n pads, the number of switches used in the polygonal routing module is less than the conventional routing module by /spl radic/(rF/sub C/n)/4 times, where the flexibility ratio r(F/sub C/) is close to 1.