{"title":"New power delivery scheme for 3D ICs to minimize simultaneous switching noise for high speed I/Os","authors":"D. C. Zhang, M. Swaminathan, S. Huh","doi":"10.1109/EPEPS.2012.6457849","DOIUrl":null,"url":null,"abstract":"Simultaneous switching noise is a detrimental issue in high speed digital systems. In this paper, we utilize power transmission line based design and current steering to minimize power supply noise, eye height and jitter penalties.","PeriodicalId":188377,"journal":{"name":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2012.6457849","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
Simultaneous switching noise is a detrimental issue in high speed digital systems. In this paper, we utilize power transmission line based design and current steering to minimize power supply noise, eye height and jitter penalties.
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