{"title":"Adaptive sensing and image processing with a general-purpose pixel-parallel sensor/processor array integrated circuit","authors":"P. Dudek","doi":"10.1109/CAMP.2007.4350340","DOIUrl":null,"url":null,"abstract":"In this paper, a pixel-parallel image sensor/processor architecture with a fine-grain massively parallel SIMD analogue processor array is overviewed and the latest VLSI implementation, SCAMPS vision chip, comprising 128 times 128 array, fabricated in a 0.35mum CMOS technology, is presented. Examples of real-time image-processing executed on the chip are shown. Sensor-level data reduction, wide dynamic range and adaptive sensing algorithms, enabled by the sensor-processor integration, are discussed.","PeriodicalId":104356,"journal":{"name":"2006 International Workshop on Computer Architecture for Machine Perception and Sensing","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Workshop on Computer Architecture for Machine Perception and Sensing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CAMP.2007.4350340","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
In this paper, a pixel-parallel image sensor/processor architecture with a fine-grain massively parallel SIMD analogue processor array is overviewed and the latest VLSI implementation, SCAMPS vision chip, comprising 128 times 128 array, fabricated in a 0.35mum CMOS technology, is presented. Examples of real-time image-processing executed on the chip are shown. Sensor-level data reduction, wide dynamic range and adaptive sensing algorithms, enabled by the sensor-processor integration, are discussed.
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