{"title":"A 3 /spl mu/V-offset operational amplifier with 20 nV//spl radic/Hz input noise PSD at DC employing both chopping and autozeroing","authors":"A.T.K. Tang","doi":"10.1109/ISSCC.2002.993094","DOIUrl":null,"url":null,"abstract":"A 3 /spl mu/V offset op-amp has been designed using both autozeroing and chopping to give 20 nV//spl radic/Hz input noise at DC with low energy at the chopping frequency. The design includes additional circuitry for reduced switching transients. Power consumption is 4 mW from a 5 V supply. Die area is 0.6/spl times/1.12 mm using a 0.6 /spl mu/m double-poly double-metal CMOS process.","PeriodicalId":423674,"journal":{"name":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2002.993094","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
Abstract
A 3 /spl mu/V offset op-amp has been designed using both autozeroing and chopping to give 20 nV//spl radic/Hz input noise at DC with low energy at the chopping frequency. The design includes additional circuitry for reduced switching transients. Power consumption is 4 mW from a 5 V supply. Die area is 0.6/spl times/1.12 mm using a 0.6 /spl mu/m double-poly double-metal CMOS process.
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